NOAA Office of Satellite and Product Operations

Please Note:  

Update 7/10/2020: GOES-15 supplemental operations will begin on Sunday, August 9, 2020 at 0000 UTC and continue through Thursday, September 3, 2020 1600 UTC. See notification for more details.

To view imagery from the operational GOES East (GOES-16) and GOES West (GOES-17) satellites, users may visit https://www.star.nesdis.noaa.gov/goes/.

NOAA 18 DHS Subsystem Summary

Component Description Status
AIPGreen
AIP1AMSU Information Processor side 1Green
AIP2AMSU Information Processor side 2Green
DDR1ADigital Data Recorder #1 A SideGreen
DDR1BDigital Data Recorder #1 B SideGreen
DDR2ADigital Data Recorder #2 A SideGreen
DDR2BDigital Data Recorder #2 B SideGreen
DDR3ADigital Data Recorder #3 A SideGreen
DDR3BDigital Data Recorder #3 B SideGreen
DDR4ADigital Data Recorder #4 A SideGreen
DDR4BDigital Data Recorder #4 B SideGreen
DDR5ADigital Data Recorder #5 A SideGreen
DDR5BDigital Data Recorder #5 B SideGreen
MIRPManipulated Information rate ProcessorGreen
MIUMHS Interface UnitGreen
TIP1TIROS Information Processor Side 1Green
TIP2TIROS Information Processor Side 2Green
XSUGreen
XSU1Cross-strap Unit Side 1Green
XSU2Cross-strap Unit Side 2Green


Subsystem History:

Date Time Component Description
04/20/201116:47:00AIP1NOAA-18 STX2 was configured for both AIP & TIP Bi-Phase to verify FCDAS ability to receive real-time AIP data.
08/19/201013:21:45MIUSlow Dump the MIU Exception Log
08/19/201013:20:37MIUSlow Dump the MIU Interrupt Log
08/19/201013:19:23MIUReset the MIU AIP FIFO
08/19/201013:19:23MIUThe MIU AIP FIFO Register was reset and AIP telemetry is flowing correctly.
08/18/201021:48:56MIUSlow Dump of MIU Interrupt Log - Unsuccessful, AIP FIFO problems
08/17/201020:23:53MIUThe MIU experienced an anomaly during the N18 MIMU Reduced Gyro Test #2.
06/28/201018:57:00XSU1STX4's configuration cleared to conclude NOAA-18 McMurdo telemetry reception and command test in preparation for upcoming NOAA-18 MIMU tests.
01/24/200813:51:24 Applies 1-sec dwell to the Main Bus Voltage.
07/11/200717:55:00TIP1TOAR 447 invesitgation. Pitch oscillation test. Dwell on NSADBDPY to determine if Solar Array boom wiggle" exists and is influencing pitch."
11/08/200617:25:30TIP1Returns TIP and DDRs to nominal orbital mode.
11/08/200612:24:20TIP2Dwell on analog channel 292 (DDR1 current, NDDR1I)
11/08/200612:24:20TIP1Dwell on analog channel 292 (DDR1 current, NDDR1I)
11/08/200610:37:00TIP1Dwell on analog channel 340 (DDR4 current, NDDR4I)
11/08/200603:48:30TIP2Dwell on analog channel 308 (DDR2 current, NDDR2I)
10/06/200621:51:00TIP1TIP dwell back to 1 sec bus voltage
10/06/200618:21:00TIP1TIP (1 sec) dwell on NTCE2H ch 27
10/06/200618:20:00TIP1TIP dwell back to 1 sec bus voltage
10/05/200615:12:00TIP1TIP (1 sec) dwell on NTCE2H ch 217
02/23/200619:41:47TIP1Dwell on analog channel 153 (bus voltage)
02/23/200616:25:08TIP1Dwell on analog channel 457 (SARR 406 side A AGC NSARA4G)
01/27/200619:33:00XSU1Deconfigure STX4
01/27/200619:26:00XSU1Configure STX4 for AIP/TIP
11/15/200518:16:00DDR5AStop Rec 5A
11/15/200518:15:00DDR5APlay SAIP at 2.66 Mbps
11/15/200518:14:00XSU1Configure XSU - Rec 5 to SBand 2
11/15/200518:13:00DDR5AStop Rec 5A
11/15/200518:12:00DDR5ASend Rec 5A to EOF
11/15/200518:11:00DDR5AStop Rec 5A
11/15/200518:10:00DDR5BStop Rec 5B
11/04/200523:39:00DDR3AStop Rec 3A
11/04/200523:38:00DDR3APlay STIP at 2.66 Mbps
11/04/200523:37:00DDR3AStop Rec 3A
11/04/200523:36:00DDR3ASend Rec 3A to End Of File
11/04/200523:35:00DDR3AStop Rec 3A
09/22/200517:20:00 Deconfigure and turn off STX 4, restore nominal analog dwell channel, remove MIMU raw telemetry from the 1 sec table, backup CPU, and remove SADTRUE on control SCP.
09/21/200517:30:00 Deconfigure and turn off STX 4, restore nominal analog dwell channel. Day 1 slew test ends
09/20/200518:00:00XSU1Clear STX4 Config
09/20/200518:00:00AIPConfig AIP for AIP Data Mode (TIP/AMSU/MHS Data)
09/20/200516:00:00AIPConfigure AIP for Tip Bi-phase data mode (Tip Data Only)
09/20/200516:00:00XSU1Configure XSU for AIP/TIP
09/12/200514:12:00XSU1Clear STX4 Configuration
09/12/200512:33:00XSUConfigure STX4 for AIP
08/22/200517:32:00 Configure TIP to normal operational mode
08/22/200517:30:00 Configure for High Speed Dwell on HIRS filter wheel motor current
08/11/200514:40:00MIRPSelect AVHRR channel 2 for APT channel A and select AVHRR channel 4 for APT channel B. All other MIRP settings will remain the same.
08/10/200517:55:00 1 sec analog dwell on NSADPOS2
08/10/200514:45:00 1 sec analog dwell on NSADPOS1
07/27/200512:05:00 1-sec Analog dwell on patch current
07/12/200517:45:00 Restore nominal dwell channel
07/12/200517:43:00 Dwell on HIRS FW motor Current
07/12/200516:20:00 Dwell on HIRS Scan Motor Current
07/12/200512:56:00 Dwell on HIRS FW motor current
07/11/200521:30:00TIP1Pitch oscillation test concluded. Return to normal dwell mnemonic (Bus Voltage).
07/05/200518:57:00 TIP to normal mode
07/05/200517:20:00 Dwell on NRWAZMTI
06/08/200507:06:00MIUClear out MIU errors and counters (CP MICLRERC)
05/27/200522:20:00TIP1TIP low speed dwell changed to channel 297 (pitch Rwheel current).
05/25/200517:30:00MIUEnable MIU bus controller, nominal operation. MIU operational.
05/25/200516:05:00MIUToggle MIU off then back on and reload patch. Operation successful.
05/25/200512:45:00MIUMIU powered on and patch loaded.
05/20/200511:56:10DDR5BDDR-5 turned on and operating nominally
05/20/200511:56:00DDR5ADDR-5 turned on and operating nominally
05/20/200511:55:50DDR4BDDR-4 turned on and operating nominally
05/20/200511:55:40DDR4ADDR-4 turned on and operating nominally
05/20/200511:55:30DDR3BDDR-3 turned on and operating nominally
05/20/200511:55:20DDR3ADDR-3 turned on and operating nominally
05/20/200511:55:10DDR1BDDR-1 turned on and operating nominally
05/20/200511:55:00DDR1ADDR-1 turned on and operating nominally
05/20/200511:51:20XSU1On orbit first use of XSU-1
05/20/200511:50:00MIRPon orbit
05/20/200511:50:00XSU2on orbit, not powered up, redundant component.
05/20/200511:50:00TIP2on orbit, not powered up, redundant component
05/20/200511:50:00AIP1on orbit, powered up
05/20/200511:50:00AIP2on orbit, not powered up, redundant component
05/20/200510:22:03TIP1On orbit
05/20/200506:00:00DDR2ADDR-2 turned on prelaunch to record boost data.
05/20/200506:00:00DDR2BDDR-2 turned on prelaunch to record boost data.
06/28/200014:15:00AIP1AIP data selected for McMurdo telemetry reception and command test in preparation for upcoming NOAA-18 MIMU tests.
06/28/200014:15:00XSU1STX4 configured for AIP data for McMurdo telemetry reception and command test in preparation for upcoming NOAA-18 MIMU tests.